Verification Environment of Peripherals for PULP RISC-V architecture using UVM
PULP is a RISC-V architecture which has peripherals interconnected with micro DMA system. This Verification Environment is designed to validate the peripherals with microDMA system with in the PULP platform. Presently, It has ability to verifying SPI and UART protocols, with plans to extends its capabilities to other peripherals in the future. Leveraging the UVM library, it facilitates the creation of reusable verification components and test environments using SystemVerilog. Application We are concentrating on enhancing PULP uDMA system with peripherals....